EMILIANO SISINNI

Full Professor
Department of Information Engineering
Room 23 - Via Branze, 38
University of Brescia
25123 - Brescia, ITALY

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Teaching Activities



Digital System for Signal Processing:

Microsoft Teams link

Link to Monday lecture meeting

Link to Friday lecture meeting


Syllabus:

  • Embedded systems introduction.
  • Digital systems (combinatorial and sequential logic, finite state machine: HW and SW implementation). CMOS technology.
  • Numerical representation. Fixed and floating point. Fractional numbers.
  • Microprocessors, microcontrollers and DSPs.
  • Memory devices. Cache memories.
  • Embedded systems programming: assembler and C. Memory mapped I/O and Programmed I/O. Polling loop and interrupt handling.
  • Local and remote model of I/O devices. Network topologies. RS232. SPI.
  • Programming and debugging tools. Logic state analyzers.
  • PLD technologies and devices.
  • VHDL - basic concepts.
  • VHDL - FSM implementations.
  • Laboratory: the Microchip uC 18F452, the TI TMS320C6000 DSP, the ALtera FPGA Cyclone III and their IDEs.


Digital System Design:


Syllabus:

  • Course Introduction. Embedded systems. Design Techniques.Hw and Sw codesign. The productivity gap.
  • Sampled systems. Sample and block processing. Digital signal processing systems. The sampling theorem. Coherent sampling. Quantization noise and error.
  • ADC and DAC: architectures and implementations.
  • Analog signal conditioning.
  • Numerical filters: FIR and IIR. Computing noise and filter implementations using fixed point arithmetic. Coefficients quantization.
  • Digital signal generatin. DDS: noise sources.
  • DSP & GPP.
  • PLD introduction: SPLD, CPLD and FPGA. PLD Design flow. The methastabilithy issue.
  • The VHDL - combinatorial and sequential logic, FSM. Procedures and functions.
  • Softcores: design and implementation.
  • Project related activities.
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